hdlConvertorAst.translate.verilog_to_hwt package¶

Submodules¶

hdlConvertorAst.translate.verilog_to_hwt.main.verilog_to_hwt(context)[source]¶

class hdlConvertorAst.translate.verilog_to_hwt.signal_assignments_to_call_op.SignalAssignmentsToCallOp[source]¶

Convert an assignment to an call operator.

visit_HdlOp(o)[source]¶

visit_HdlStmAssign(o)[source]¶

class hdlConvertorAst.translate.verilog_to_hwt.verilog_types_to_hwt.VerilogTypesToHwt[source]¶

_visit_type(t)[source]¶

visit_HdlModuleDef(o)[source]¶

Remove genvar instances as they do not need forward declarations