Index

_

__init__() (hdlConvertorAst.hdlAst.utils.CodePosition method) (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.hdlUtils.AutoIndentingStream method) (hdlConvertorAst.to.hdlUtils.Indent method) (hdlConvertorAst.to.hdlUtils.UnIndent method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) (hdlConvertorAst.translate.common.add_call_operator_for_call_without_parenthesis.AddCallOperatorForCallWithoutParenthesis method) (hdlConvertorAst.translate.common.discover_declarations.BuiltIn method) (hdlConvertorAst.translate.common.discover_declarations.DiscoverDeclarations method) (hdlConvertorAst.translate.common.name_scope._INVALID method) (hdlConvertorAst.translate.common.name_scope.NameOccupiedErr method) (hdlConvertorAst.translate.common.name_scope.NameScope method) (hdlConvertorAst.translate.common.name_scope.WithNameScope method) (hdlConvertorAst.translate.common.resolve_names.ResolveNames method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.add_unique_labels_to_all_processes.AddUniqueLabelsToAllProcesses method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.apply_io_scope_to_signal_names.ApplyIoScopeToSignalNames method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_operands_to_basic_hdl_sim_model.BasicHdlSimModelTranslateVerilogOperands method)

_discover_declarations() (hdlConvertorAst.translate.common.discover_declarations.DiscoverDeclarations method) _INVALID (class in hdlConvertorAst.translate.common.name_scope) _mask_fits_hex() (in module hdlConvertorAst.to.hdlUtils) _parse_hdlConvertor_json() (in module hdlConvertorAst.parse_hdlConvertor_json) _precedence_of_expr() (hdlConvertorAst.to.common.ToHdlCommon method) _sanitize_name() (hdlConvertorAst.translate.common.name_scope.NameScope class method) _unaryEventOps (hdlConvertorAst.to.basic_hdl_sim_model.expr.ToBasicHdlSimModelExpr attribute) _verilog_slice_to_width() (in module hdlConvertorAst.to.basic_hdl_sim_model.utils) _visit_bin_op() (hdlConvertorAst.to.common.ToHdlCommon method) _visit_HdlStmExitOrNext() (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) _visit_iHdlStatement() (hdlConvertorAst.to.json.ToJson method) _visit_operand() (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.verilog.expr.ToVerilog2005Expr method) (hdlConvertorAst.to.vhdl.expr.ToVhdl2008Expr method) _visit_operand_parentheses_extra_check() (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.vhdl.expr.ToVhdl2008Expr method) _visit_operator_index() (hdlConvertorAst.to.common.ToHdlCommon method) _visit_type() (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_types_to_basic_hdl_sim_model.VerilogTypesToBasicHdlSimModel method) (hdlConvertorAst.translate.verilog_to_hwt.verilog_types_to_hwt.VerilogTypesToHwt method) _write_begin() (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method)

A

add_io_prefix() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.apply_io_scope_to_signal_names) AddCallOperatorForCallWithoutParenthesis (class in hdlConvertorAst.translate.common.add_call_operator_for_call_without_parenthesis) AddUniqueLabelsToAllProcesses (class in hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.add_unique_labels_to_all_processes) all_ids_constant() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.detect_compiletime_statements) ALL_UNARY_OPS (hdlConvertorAst.to.common.ToHdlCommon attribute)

ApplyIoScopeToSignalNames (class in hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.apply_io_scope_to_signal_names) ASSIGN_OPS (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm attribute) AssignmentToUpdateAssignment (class in hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.assignment_to_update_assignment) ASSOCIATIVITY (class in hdlConvertorAst.to.common) AutoIndentingStream (class in hdlConvertorAst.to.hdlUtils)

B

BasicHdlSimModelTranslateVerilogOperands (class in hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_operands_to_basic_hdl_sim_model) bit_string() (in module hdlConvertorAst.to.hdlUtils) BitsT() (in module hdlConvertorAst.to.basic_hdl_sim_model.utils) (in module hdlConvertorAst.to.hwt.utils)

BITWISE_BIN_OPS (hdlConvertorAst.to.vhdl.expr.ToVhdl2008Expr attribute) BuiltIn (class in hdlConvertorAst.translate.common.discover_declarations)

C

checked_name() (hdlConvertorAst.translate.common.name_scope.NameScope method) close() (hdlConvertorAst.to.hdlUtils.AutoIndentingStream method) CodePosition (class in hdlConvertorAst.hdlAst.utils)

collect_array_dims() (in module hdlConvertorAst.to.verilog.utils) collect_hdl_ids() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.wrap_module_statements_to_processes) collect_indexes() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.wrap_module_statements_to_processes) context() (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.add_unique_labels_to_all_processes.AddUniqueLabelsToAllProcesses method)

D

DetectCompileTimeStatements (class in hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.detect_compiletime_statements) DIR2V (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 attribute) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 attribute) discover_declarations() (hdlConvertorAst.translate.common.discover_declarations.DiscoverDeclarations method)

discover_outputs() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.discover_stm_outputs) discover_stm_outputs() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.discover_stm_outputs) discover_stm_outputs_context() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.discover_stm_outputs) DiscoverDeclarations (class in hdlConvertorAst.translate.common.discover_declarations)

E

elifs_to_if_then_else() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.elifs_to_if_then_else)

EQ_NEQ_OPS (hdlConvertorAst.to.vhdl.expr.ToVhdl2008Expr attribute)

F

file_name (hdlConvertorAst.hdlAst.utils.CodePosition attribute)

G

GENERIC_BIN_OPS (hdlConvertorAst.to.basic_hdl_sim_model.expr.ToBasicHdlSimModelExpr attribute) (hdlConvertorAst.to.common.ToHdlCommon attribute) (hdlConvertorAst.to.hwt.expr.ToHwtExpr attribute) (hdlConvertorAst.to.systemc.expr.ToSystemcExpr attribute) (hdlConvertorAst.to.verilog.expr.ToVerilog2005Expr attribute) (hdlConvertorAst.to.vhdl.expr.ToVhdl2008Expr attribute) GENERIC_UNARY_OPS (hdlConvertorAst.to.basic_hdl_sim_model.expr.ToBasicHdlSimModelExpr attribute) (hdlConvertorAst.to.common.ToHdlCommon attribute) (hdlConvertorAst.to.systemc.expr.ToSystemcExpr attribute) (hdlConvertorAst.to.verilog.expr.ToVerilog2005Expr attribute) (hdlConvertorAst.to.vhdl.expr.ToVhdl2008Expr attribute)

GENERIC_UNARY_OPS_POSTFIX (hdlConvertorAst.to.common.ToHdlCommon attribute) (hdlConvertorAst.to.systemc.expr.ToSystemcExpr attribute) (hdlConvertorAst.to.verilog.expr.ToVerilog2005Expr attribute) get_child() (hdlConvertorAst.translate.common.name_scope.NameScope method) get_object_and_scope_by_name() (hdlConvertorAst.translate.common.name_scope.NameScope method) get_object_name() (hdlConvertorAst.translate.common.name_scope.NameScope method) get_output_ids() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.discover_stm_outputs) get_wire_t_params() (in module hdlConvertorAst.to.verilog.utils)

H

hdl_add_int() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.utils) hdl_call() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.utils) hdl_downto() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.utils) hdl_getattr() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.utils) hdl_index() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.utils) hdl_map_asoc() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.utils) hdl_name_prefix() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.utils) hdl_or() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.utils) hdl_sub_int() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.utils) HdlAstModifier (class in hdlConvertorAst.to.hdl_ast_modifier) HdlAstVisitor (class in hdlConvertorAst.to.hdl_ast_visitor) HDLCONVERTOR_JSON (hdlConvertorAst.language.Language attribute) hdlConvertorAst module hdlConvertorAst.hdlAst module hdlConvertorAst.hdlAst.utils module hdlConvertorAst.language module hdlConvertorAst.parse_hdlConvertor_json module hdlConvertorAst.py_ver_compatibility module hdlConvertorAst.to module hdlConvertorAst.to.basic_hdl_sim_model module hdlConvertorAst.to.basic_hdl_sim_model.expr module hdlConvertorAst.to.basic_hdl_sim_model.keywords module hdlConvertorAst.to.basic_hdl_sim_model.stm module hdlConvertorAst.to.basic_hdl_sim_model.utils module hdlConvertorAst.to.common module hdlConvertorAst.to.hdl_ast_modifier module hdlConvertorAst.to.hdl_ast_visitor module hdlConvertorAst.to.hdlUtils module hdlConvertorAst.to.hwt module hdlConvertorAst.to.hwt.expr module hdlConvertorAst.to.hwt.keywords module hdlConvertorAst.to.hwt.stm module hdlConvertorAst.to.hwt.utils module hdlConvertorAst.to.json module hdlConvertorAst.to.json_debug module hdlConvertorAst.to.systemc module hdlConvertorAst.to.systemc.expr module hdlConvertorAst.to.systemc.keywords module hdlConvertorAst.to.systemc.stm module hdlConvertorAst.to.verilog module hdlConvertorAst.to.verilog.constants module hdlConvertorAst.to.verilog.expr module

hdlConvertorAst.to.verilog.keywords module hdlConvertorAst.to.verilog.stm module hdlConvertorAst.to.verilog.utils module hdlConvertorAst.to.verilog.verilog2005 module hdlConvertorAst.to.vhdl module hdlConvertorAst.to.vhdl.expr module hdlConvertorAst.to.vhdl.keywords module hdlConvertorAst.to.vhdl.stm module hdlConvertorAst.to.vhdl.vhdl2008 module hdlConvertorAst.translate module hdlConvertorAst.translate.common module hdlConvertorAst.translate.common.add_call_operator_for_call_without_parenthesis module hdlConvertorAst.translate.common.discover_declarations module hdlConvertorAst.translate.common.name_scope module hdlConvertorAst.translate.common.resolve_names module hdlConvertorAst.translate.verilog_builtins module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.add_unique_labels_to_all_processes module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.apply_io_scope_to_signal_names module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.assignment_to_update_assignment module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.detect_compiletime_statements module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.discover_stm_outputs module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.elifs_to_if_then_else module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.main module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.utils module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_operands_to_basic_hdl_sim_model module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_resolve_types module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_types_to_basic_hdl_sim_model module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.wrap_module_statements_to_processes module hdlConvertorAst.translate.verilog_to_hwt module hdlConvertorAst.translate.verilog_to_hwt.main module hdlConvertorAst.translate.verilog_to_hwt.signal_assignments_to_call_op module hdlConvertorAst.translate.verilog_to_hwt.verilog_types_to_hwt module hdlConvertorAst.translate.verilog_to_vhdl module hdlConvertorAst.translate.verilog_to_vhdl.inject_process_sens_to_statements module hdlConvertorAst.translate.vhdl_to_verilog module HWT (hdlConvertorAst.language.Language attribute)

I

Indent (class in hdlConvertorAst.to.hdlUtils) INDENT_STEP (hdlConvertorAst.to.common.ToHdlCommon attribute) InjectProcessSensToStatements (class in hdlConvertorAst.translate.verilog_to_vhdl.inject_process_sens_to_statements) is_clock_edge_dependent() (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.assignment_to_update_assignment.AssignmentToUpdateAssignment method)

is_str() (in module hdlConvertorAst.py_ver_compatibility) is_system_verilog() (hdlConvertorAst.language.Language method) is_verilog() (hdlConvertorAst.language.Language method) is_vhdl() (hdlConvertorAst.language.Language method) iter_with_last() (in module hdlConvertorAst.to.hdlUtils)

L

L_TO_R (hdlConvertorAst.to.common.ASSOCIATIVITY attribute) Language (class in hdlConvertorAst.language) LanguageKeyword (class in hdlConvertorAst.translate.common.name_scope)

level_pop() (hdlConvertorAst.translate.common.name_scope.NameScope method) level_push() (hdlConvertorAst.translate.common.name_scope.NameScope method) link_module_dec_def() (in module hdlConvertorAst.translate.vhdl_to_verilog)

M

make_top() (hdlConvertorAst.translate.common.name_scope.NameScope class method) method_as_function() (in module hdlConvertorAst.py_ver_compatibility) module hdlConvertorAst hdlConvertorAst.hdlAst hdlConvertorAst.hdlAst.utils hdlConvertorAst.language hdlConvertorAst.parse_hdlConvertor_json hdlConvertorAst.py_ver_compatibility hdlConvertorAst.to hdlConvertorAst.to.basic_hdl_sim_model hdlConvertorAst.to.basic_hdl_sim_model.expr hdlConvertorAst.to.basic_hdl_sim_model.keywords hdlConvertorAst.to.basic_hdl_sim_model.stm hdlConvertorAst.to.basic_hdl_sim_model.utils hdlConvertorAst.to.common hdlConvertorAst.to.hdl_ast_modifier hdlConvertorAst.to.hdl_ast_visitor hdlConvertorAst.to.hdlUtils hdlConvertorAst.to.hwt hdlConvertorAst.to.hwt.expr hdlConvertorAst.to.hwt.keywords hdlConvertorAst.to.hwt.stm hdlConvertorAst.to.hwt.utils hdlConvertorAst.to.json hdlConvertorAst.to.json_debug hdlConvertorAst.to.systemc hdlConvertorAst.to.systemc.expr hdlConvertorAst.to.systemc.keywords hdlConvertorAst.to.systemc.stm hdlConvertorAst.to.verilog hdlConvertorAst.to.verilog.constants hdlConvertorAst.to.verilog.expr hdlConvertorAst.to.verilog.keywords hdlConvertorAst.to.verilog.stm hdlConvertorAst.to.verilog.utils hdlConvertorAst.to.verilog.verilog2005 hdlConvertorAst.to.vhdl hdlConvertorAst.to.vhdl.expr hdlConvertorAst.to.vhdl.keywords hdlConvertorAst.to.vhdl.stm hdlConvertorAst.to.vhdl.vhdl2008 hdlConvertorAst.translate hdlConvertorAst.translate.common hdlConvertorAst.translate.common.add_call_operator_for_call_without_parenthesis hdlConvertorAst.translate.common.discover_declarations hdlConvertorAst.translate.common.name_scope hdlConvertorAst.translate.common.resolve_names hdlConvertorAst.translate.verilog_builtins hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.add_unique_labels_to_all_processes hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.apply_io_scope_to_signal_names hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.assignment_to_update_assignment hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.detect_compiletime_statements hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.discover_stm_outputs hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.elifs_to_if_then_else hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.main hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.utils hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_operands_to_basic_hdl_sim_model hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_resolve_types hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_types_to_basic_hdl_sim_model hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.wrap_module_statements_to_processes hdlConvertorAst.translate.verilog_to_hwt hdlConvertorAst.translate.verilog_to_hwt.main hdlConvertorAst.translate.verilog_to_hwt.signal_assignments_to_call_op hdlConvertorAst.translate.verilog_to_hwt.verilog_types_to_hwt hdlConvertorAst.translate.verilog_to_vhdl hdlConvertorAst.translate.verilog_to_vhdl.inject_process_sens_to_statements hdlConvertorAst.translate.vhdl_to_verilog

N

NameOccupiedErr NameScope (class in hdlConvertorAst.translate.common.name_scope)

NONE (hdlConvertorAst.to.common.ASSOCIATIVITY attribute) NUM_BASES (hdlConvertorAst.to.vhdl.expr.ToVhdl2008Expr attribute)

O

ObjectForNameNotFound OP_PRECEDENCE (hdlConvertorAst.to.basic_hdl_sim_model.expr.ToBasicHdlSimModelExpr attribute) (hdlConvertorAst.to.hwt.expr.ToHwtExpr attribute) (hdlConvertorAst.to.systemc.expr.ToSystemcExpr attribute) (hdlConvertorAst.to.verilog.expr.ToVerilog2005Expr attribute) (hdlConvertorAst.to.vhdl.expr.ToVhdl2008Expr attribute)

P

parse_hdlConvertor_json() (in module hdlConvertorAst.parse_hdlConvertor_json) parse_hdlConvertor_json_file() (in module hdlConvertorAst.parse_hdlConvertor_json) parse_hdlConvertor_json_str() (in module hdlConvertorAst.parse_hdlConvertor_json) pop_index_list() (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.assignment_to_update_assignment.AssignmentToUpdateAssignment method)

pop_signed_flag() (in module hdlConvertorAst.to.verilog.expr) PORT_REG (hdlConvertorAst.to.verilog.constants.SIGNAL_TYPE attribute) PORT_WIRE (hdlConvertorAst.to.verilog.constants.SIGNAL_TYPE attribute) propopulate_verilog_builtins() (in module hdlConvertorAst.translate.verilog_builtins)

R

R_TO_L (hdlConvertorAst.to.common.ASSOCIATIVITY attribute) RE_LETTER (hdlConvertorAst.translate.common.name_scope.NameScope attribute) RE_NON_ID_CHAR (hdlConvertorAst.translate.common.name_scope.NameScope attribute)

REG (hdlConvertorAst.to.verilog.constants.SIGNAL_TYPE attribute) register_name() (hdlConvertorAst.translate.common.name_scope.NameScope method) ResolveNames (class in hdlConvertorAst.translate.common.resolve_names)

S

sensitivityByOp() (in module hdlConvertorAst.to.basic_hdl_sim_model.utils) SIGNAL_TYPE (class in hdlConvertorAst.to.verilog.constants) SignalAssignmentsToCallOp (class in hdlConvertorAst.translate.verilog_to_hwt.signal_assignments_to_call_op) start_column (hdlConvertorAst.hdlAst.utils.CodePosition attribute) start_line (hdlConvertorAst.hdlAst.utils.CodePosition attribute) stop_column (hdlConvertorAst.hdlAst.utils.CodePosition attribute)

stop_line (hdlConvertorAst.hdlAst.utils.CodePosition attribute) SYSTEM_VERILOG (hdlConvertorAst.language.Language attribute) SYSTEM_VERILOG_2005 (hdlConvertorAst.language.Language attribute) SYSTEM_VERILOG_2009 (hdlConvertorAst.language.Language attribute) SYSTEM_VERILOG_2012 (hdlConvertorAst.language.Language attribute) SYSTEM_VERILOG_2017 (hdlConvertorAst.language.Language attribute)

T

to_property_call() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.utils) to_unsigned() (in module hdlConvertorAst.to.hdlUtils) ToBasicHdlSimModelExpr (class in hdlConvertorAst.to.basic_hdl_sim_model.expr) ToBasicHdlSimModelStm (class in hdlConvertorAst.to.basic_hdl_sim_model.stm) ToHdlCommon (class in hdlConvertorAst.to.common) ToHwtExpr (class in hdlConvertorAst.to.hwt.expr) ToHwtStm (class in hdlConvertorAst.to.hwt.stm) ToJson (class in hdlConvertorAst.to.json)

ToJsonDebug (class in hdlConvertorAst.to.json_debug) ToSystemcExpr (class in hdlConvertorAst.to.systemc.expr) ToSystemcStm (class in hdlConvertorAst.to.systemc.stm) ToVerilog2005 (class in hdlConvertorAst.to.verilog.verilog2005) ToVerilog2005Expr (class in hdlConvertorAst.to.verilog.expr) ToVerilog2005Stm (class in hdlConvertorAst.to.verilog.stm) ToVhdl2008 (class in hdlConvertorAst.to.vhdl.vhdl2008) ToVhdl2008Expr (class in hdlConvertorAst.to.vhdl.expr) ToVhdl2008Stm (class in hdlConvertorAst.to.vhdl.stm)

U

UnIndent (class in hdlConvertorAst.to.hdlUtils)

update() (hdlConvertorAst.translate.common.name_scope.NameScope method)

V

VERILOG (hdlConvertorAst.language.Language attribute) VERILOG_1995 (hdlConvertorAst.language.Language attribute) VERILOG_2001 (hdlConvertorAst.language.Language attribute) VERILOG_2001_NOCONFIG (hdlConvertorAst.language.Language attribute) VERILOG_2005 (hdlConvertorAst.language.Language attribute) verilog_slice_to_width() (in module hdlConvertorAst.to.basic_hdl_sim_model.utils) verilog_to_basic_hdl_sim_model() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.main) verilog_to_hwt() (in module hdlConvertorAst.translate.verilog_to_hwt.main) VerilogResolveTypes (class in hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_resolve_types) VerilogTypesToBasicHdlSimModel (class in hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_types_to_basic_hdl_sim_model) VerilogTypesToHwt (class in hdlConvertorAst.translate.verilog_to_hwt.verilog_types_to_hwt) VHDL (hdlConvertorAst.language.Language attribute) VHDL_2002 (hdlConvertorAst.language.Language attribute) VHDL_2008 (hdlConvertorAst.language.Language attribute) visit_assert() (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) visit_body_items() (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_CodePosition() (hdlConvertorAst.to.json.ToJson method) visit_component() (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_direction() (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_doc() (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_generic_declr() (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) visit_hdlAttributes() (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) visit_HdlClassDef() (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_HdlCompInst() (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) (hdlConvertorAst.translate.common.discover_declarations.DiscoverDeclarations method) (hdlConvertorAst.translate.common.resolve_names.ResolveNames method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.apply_io_scope_to_signal_names.ApplyIoScopeToSignalNames method) visit_HdlContext() (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) visit_HdlDirection() (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.json_debug.ToJsonDebug method) visit_HdlEnumDef() (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_HdlFunctionDef() (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) (hdlConvertorAst.translate.common.discover_declarations.DiscoverDeclarations method) (hdlConvertorAst.translate.common.resolve_names.ResolveNames method) visit_HdlIdDef() (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.json_debug.ToJsonDebug method) (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) (hdlConvertorAst.translate.common.discover_declarations.DiscoverDeclarations method) (hdlConvertorAst.translate.common.resolve_names.ResolveNames method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.apply_io_scope_to_signal_names.ApplyIoScopeToSignalNames method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_resolve_types.VerilogResolveTypes method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_types_to_basic_hdl_sim_model.VerilogTypesToBasicHdlSimModel method) visit_HdlImport() (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_HdlLibrary() (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_HdlModuleDec() (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) (hdlConvertorAst.translate.common.discover_declarations.DiscoverDeclarations method) (hdlConvertorAst.translate.common.resolve_names.ResolveNames method) visit_HdlModuleDef() (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) (hdlConvertorAst.translate.common.discover_declarations.DiscoverDeclarations method) (hdlConvertorAst.translate.common.resolve_names.ResolveNames method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.add_unique_labels_to_all_processes.AddUniqueLabelsToAllProcesses method) (hdlConvertorAst.translate.verilog_to_hwt.verilog_types_to_hwt.VerilogTypesToHwt method) visit_HdlOp() (hdlConvertorAst.to.basic_hdl_sim_model.expr.ToBasicHdlSimModelExpr method) (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.hwt.expr.ToHwtExpr method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.systemc.expr.ToSystemcExpr method) (hdlConvertorAst.to.verilog.expr.ToVerilog2005Expr method) (hdlConvertorAst.to.vhdl.expr.ToVhdl2008Expr method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.apply_io_scope_to_signal_names.ApplyIoScopeToSignalNames method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_operands_to_basic_hdl_sim_model.BasicHdlSimModelTranslateVerilogOperands method) (hdlConvertorAst.translate.verilog_to_hwt.signal_assignments_to_call_op.SignalAssignmentsToCallOp method) visit_HdlPhysicalDef() (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_HdlStmAssign() (hdlConvertorAst.to.basic_hdl_sim_model.stm.ToBasicHdlSimModelStm method) (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.hwt.stm.ToHwtStm method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.systemc.stm.ToSystemcStm method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.apply_io_scope_to_signal_names.ApplyIoScopeToSignalNames method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.assignment_to_update_assignment.AssignmentToUpdateAssignment method) (hdlConvertorAst.translate.verilog_to_hwt.signal_assignments_to_call_op.SignalAssignmentsToCallOp method) visit_HdlStmBlock() (hdlConvertorAst.to.basic_hdl_sim_model.stm.ToBasicHdlSimModelStm method) (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.hwt.stm.ToHwtStm method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.systemc.stm.ToSystemcStm method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) visit_HdlStmBlockJoinType() (hdlConvertorAst.to.json.ToJson method) visit_HdlStmBreak() (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.hwt.stm.ToHwtStm method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.systemc.stm.ToSystemcStm method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) visit_HdlStmCase() (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.hwt.stm.ToHwtStm method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.systemc.stm.ToSystemcStm method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.detect_compiletime_statements.DetectCompileTimeStatements method)

visit_HdlStmContinue() (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.hwt.stm.ToHwtStm method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.systemc.stm.ToSystemcStm method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) visit_HdlStmExit() (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_HdlStmFor() (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.hwt.stm.ToHwtStm method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) visit_HdlStmForIn() (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) visit_HdlStmIf() (hdlConvertorAst.to.basic_hdl_sim_model.stm.ToBasicHdlSimModelStm method) (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.hwt.stm.ToHwtStm method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.systemc.stm.ToSystemcStm method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.apply_io_scope_to_signal_names.ApplyIoScopeToSignalNames method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.detect_compiletime_statements.DetectCompileTimeStatements method) visit_HdlStmNext() (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_HdlStmNop() (hdlConvertorAst.to.basic_hdl_sim_model.stm.ToBasicHdlSimModelStm method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.hwt.stm.ToHwtStm method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) visit_HdlStmProcess() (hdlConvertorAst.to.basic_hdl_sim_model.stm.ToBasicHdlSimModelStm method) (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.hwt.stm.ToHwtStm method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.systemc.stm.ToSystemcStm method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) (hdlConvertorAst.translate.verilog_to_vhdl.inject_process_sens_to_statements.InjectProcessSensToStatements method) visit_HdlStmRepeat() (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) visit_HdlStmReturn() (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.systemc.stm.ToSystemcStm method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) visit_HdlStmThrow() (hdlConvertorAst.to.basic_hdl_sim_model.stm.ToBasicHdlSimModelStm method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.hwt.stm.ToHwtStm method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.systemc.stm.ToSystemcStm method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) visit_HdlStmWait() (hdlConvertorAst.to.basic_hdl_sim_model.stm.ToBasicHdlSimModelStm method) (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.hwt.stm.ToHwtStm method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) visit_HdlStmWhile() (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.hwt.stm.ToHwtStm method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) visit_HdlValueIdspace() (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_HdlValueInt() (hdlConvertorAst.to.basic_hdl_sim_model.expr.ToBasicHdlSimModelExpr method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.systemc.expr.ToSystemcExpr method) (hdlConvertorAst.to.verilog.expr.ToVerilog2005Expr method) (hdlConvertorAst.to.vhdl.expr.ToVhdl2008Expr method) visit_iHdlExpr() (hdlConvertorAst.to.basic_hdl_sim_model.expr.ToBasicHdlSimModelExpr method) (hdlConvertorAst.to.common.ToHdlCommon method) (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) (hdlConvertorAst.to.json_debug.ToJsonDebug method) (hdlConvertorAst.to.systemc.expr.ToSystemcExpr method) (hdlConvertorAst.to.verilog.expr.ToVerilog2005Expr method) (hdlConvertorAst.to.vhdl.expr.ToVhdl2008Expr method) (hdlConvertorAst.translate.common.add_call_operator_for_call_without_parenthesis.AddCallOperatorForCallWithoutParenthesis method) (hdlConvertorAst.translate.common.resolve_names.ResolveNames method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.apply_io_scope_to_signal_names.ApplyIoScopeToSignalNames method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.detect_compiletime_statements.DetectCompileTimeStatements method) (hdlConvertorAst.translate.verilog_to_vhdl.inject_process_sens_to_statements.InjectProcessSensToStatements method) visit_iHdlObj() (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.json.ToJson method) visit_iHdlObj_list() (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) visit_iHdlObjWithName() (hdlConvertorAst.to.json.ToJson method) visit_iHdlStatement() (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.systemc.stm.ToSystemcStm method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) visit_iHdlStatement_in_statement() (hdlConvertorAst.to.basic_hdl_sim_model.stm.ToBasicHdlSimModelStm method) (hdlConvertorAst.to.systemc.stm.ToSystemcStm method) (hdlConvertorAst.to.verilog.stm.ToVerilog2005Stm method) visit_main_obj() (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_map() (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_map_item() (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_operator_call() (hdlConvertorAst.to.common.ToHdlCommon method) visit_param() (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.apply_io_scope_to_signal_names.ApplyIoScopeToSignalNames method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.detect_compiletime_statements.DetectCompileTimeStatements method) visit_param_or_port_declr() (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) visit_port() (hdlConvertorAst.to.hdl_ast_modifier.HdlAstModifier method) (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.apply_io_scope_to_signal_names.ApplyIoScopeToSignalNames method) visit_port_declr() (hdlConvertorAst.to.verilog.verilog2005.ToVerilog2005 method) visit_port_param_map() (hdlConvertorAst.translate.common.resolve_names.ResolveNames method) visit_report() (hdlConvertorAst.to.vhdl.stm.ToVhdl2008Stm method) visit_str() (hdlConvertorAst.to.vhdl.expr.ToVhdl2008Expr method) visit_type() (hdlConvertorAst.to.hdl_ast_visitor.HdlAstVisitor method) (hdlConvertorAst.to.vhdl.vhdl2008.ToVhdl2008 method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_resolve_types.VerilogResolveTypes method) (hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.verilog_types_to_basic_hdl_sim_model.VerilogTypesToBasicHdlSimModel method) visit_type_array_part() (hdlConvertorAst.to.verilog.expr.ToVerilog2005Expr method) visit_type_first_part() (hdlConvertorAst.to.verilog.expr.ToVerilog2005Expr method)

W

WIRE (hdlConvertorAst.to.verilog.constants.SIGNAL_TYPE attribute) WithNameScope (class in hdlConvertorAst.translate.common.name_scope)

wrap_module_statements_to_processes() (in module hdlConvertorAst.translate.verilog_to_basic_hdl_sim_model.wrap_module_statements_to_processes) write() (hdlConvertorAst.to.hdlUtils.AutoIndentingStream method)